Signal Integrity Engineer

Position:  Signal Integrity Engineer
Location:  Sunnyvale, CA
Company : Aruba Networks
Job Id:  0066
# of Openings:   1
Signal Integrity Engineer

As a member of the hardware development team, the Signal Integrity Engineer will play a key role in the design, analysis, and constraints generation for enterprise class networking products, such as Aruba’s leading APs and controllers. Candidate will work with US and overseas teams as a key contributor of the larger team of hardware and ASIC designers.

Responsibilities:

• Work directly with ASIC, hardware, and PCB layout design teams to evaluate design tradeoffs and optimize design performance taking into account risk, costs, and manufacturability.
• Perform pre- and post-route signal integrity analysis of both PCB interfaces and ASIC package design.
• Generate and verify constraint rules for PCB layout and package design.
• Design and analysis of DDR2/DDR3 discrete as well as DIMM based systems.
• Design and analysis of multi-gigabit serial channel links meeting PCIe, XFI, XAUI, RXAUI, SFI, 10Gbase-KR, and other MSA and standards.
• Reduction of radiated emissions, and knowledge of shielding techniques.
• AC and DC analysis and design of power delivery networks.
• Perform physical measurements (oscilloscope, TDR, network analyzer) to collect time and frequency domain data for design validation, interconnect characterization, and selection of optimal TX pre-/de-emphasis and RX equalization SerDes settings over the full operating range. Correlation to simulations.
• Knowledgeable using most major SI/PI tools such as Hyperlynx, HSPICE, Matlab, StatEye, Sigrity, HFSS, CST, and other tools.

Requirements:

• MSEE combined with 5 to 10 years of related experience or BSEE combined with 7 to 10+ years related experience.
• Strong foundation in transmission line theory, and in-depth knowledge of electromagnetics. 
• Proficiency with Hyperlynx, HSPICE, and Matlab. Other circuit simulation tools such as ADS, Microwave Office, CST, HFSS, etcetera is a plus. 
• Experience correlating simulation results with lab measurements using oscilloscopes, TDRs, and VNAs is a plus.
• Familiar with high-speed DDR2/DDR3 designs, high-speed serial channel link analysis and simulation, PLLs, SerDes, and logic families such as CML, LVDS, SSTL, HSTL, etc.
• Must be self motivated with strong communication and teamwork skills.

We offer:

• Competitive compensation
• Highly challenging and rewarding environment
• Ability to impact the business

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